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3.3V CMOS 20-BIT BUFFERS Integrated Device Technology, Inc. IDT74FCT163827A/B/C FEATURES: * 0.5 MICRON CMOS Technology * Typical tSK(o) (Output Skew) < 250ps * ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) * Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP and 15.7 mil pitch TVSOP * Extended commercial range of -40C to +85C * VCC = 3.3V 0.3V, Normal Range or VCC = 2.7 to 3.6V, Extended Range * CMOS power levels (0.4W typ. static) * Rail-to-Rail output swing for increased noise margin * Low Ground Bounce (0.3V typ.) * Inputs (except I/O) can be driven by 3.3V or 5V components DESCRIPTION: The FCT163827A/B/C 20-bit buffers are built using advanced dual metal CMOS technology. These 20-bit bus drivers provide high-performance bus interface buffering for wide data/address paths or busses carrying parity. Two pairs of NAND-ed output enable controls offer maximum control flexibility and are organized to operate the device as two 10bit buffers or one 20-bit buffer. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The FCT163827A/B/C have series current limiting resistors. This offers low ground bounce, minimal undershoot, and controlled output fall times-reducing the need for external series terminating resistors. The inputs of the FCT163827A/B/C can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V supply system. FUNCTIONAL BLOCK DIAGRAM 1OE1 1OE2 2OE1 2OE2 1A1 1Y1 2A1 2Y1 TO 9 OTHER CHANNELS 3083 drw 01 TO 9 OTHER CHANNELS 3083 drw 02 The IDT logo is a registered trademark of Integrated Device Technology, Inc. COMMERCIAL TEMPERATURE RANGE (c)1996 Integrated Device Technology, Inc. AUGUST 1996 8.9 DSC-3083/3 1 IDT74FCT163827A/B/C FAST CMOS 20-BIT BUFFERS COMMERCIAL TEMPERATURE RANGE PIN CONFIGURATIONS PIN DESCRIPTION Pin Names xOEx Description Output Enable Inputs (Active LOW) Data Inputs 3-State Outputs 3083 tbl 01 1OE1 1Y1 1Y2 1 2 3 4 5 6 7 8 9 10 11 12 13 56 55 54 53 52 51 50 49 48 47 46 45 44 xAx 1OE2 1A1 1A2 xYx GND 1Y3 1Y4 GND 1A3 1A4 ABSOLUTE MAXIMUM RATINGS(1) Symbol VTERM(2) VTERM(3) VTERM(4) TSTG IOUT Description Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature DC Output Current Max. -0.5 to +4.6 -0.5 to +7.0 -0.5 to VCC + 0.5 -65 to +150 -60 to +60 Unit V V V VCC 1Y5 1Y6 1Y7 VCC 1A5 1A6 1A7 C mA GND 1Y8 1Y9 1Y10 2Y1 2Y2 2Y3 GND 1A8 1A9 1A10 2A1 2A2 2A3 14 SO56-1 43 SO56-2 15 SO56-3 42 16 17 18 19 20 21 22 23 24 25 26 27 28 41 40 39 38 37 36 35 34 33 32 31 30 29 3083 lnk 03 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Vcc terminals. 3. Input terminals. 4. Output and I/O terminals. GND 2Y4 2Y5 2Y6 GND 2A4 2A5 2A6 FUNCTION TABLE(1) xOE OE1 L L H X Inputs xOE OE2 L L X H xAx L H X X Outputs xYx L H Z Z 3083 tbl 02 VCC 2Y7 2Y8 VCC 2A7 2A8 GND 2Y9 2Y10 2OE1 GND 2A9 2A10 2OE2 NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High Impedance SSOP/ TSSOP/TVSOP TOP VIEW 3083 drw 03 CAPACITANCE (TA = +25C, f = 1.0MHz) Symbol Parameter(1) CIN Input Capacitance COUT Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 3.5 3.5 Max. Unit 6.0 pF 8.0 pF NOTE: 1. This parameter is measured at characterization but not tested. 3083 lnk 04 8.9 2 IDT74FCT163827A/B/C FAST CMOS 20-BIT BUFFERS COMMERCIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Commercial: TA = -40C to +85C, VCC = 2.7V to 3.6V Symbol VIH VIL II H II L IOZH IOZL VIK IODH IODL VOH Parameter Input HIGH Level (Input pins) Input HIGH Level (I/O pins) Input LOW Level (Input and I/O pins) Input HIGH Current (Input pins) Input HIGH Current (I/O pins) Input LOW Current (Input pins) Input LOW Current (I/O pins) High Impedance Output Current (3-State Output pins) Clamp Diode Voltage Output HIGH Current Output LOW Current Output HIGH Voltage VCC = Max. VCC = Max. VI = 5.5V VI = VCC VI = GND VI = GND VO = VCC VO = GND VCC = Min., IIN = -18mA VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3) VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3) VCC = Min. VIN = VIH or VIL VCC = 3.0V VIN = VIH or VIL VCC = Min. VIN = VIH or VIL IOH = -0.1mA IOH = -3mA IOH = -8mA IOL = 0.1mA IOL = 16mA IOL = 24mA VCC = 3.0V IOL = 24mA VIN = VIH or VIL VCC = Max., VO = GND(3) -- Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level Min. 2.0 2.0 -0.5 -- -- -- -- -- -- -- -36 50 VCC-0.2 2.4 2.4 (5) -- -- -- -- -60 -- -- Typ.(2) -- -- -- Max. 5.5 VCC+0.5 0.8 Unit V V -- -- -- -- -- -- -0.7 1 1 1 1 1 1 -1.2 A A V mA mA V -60 90 -- 3.0 3.0 -- 0.2 0.3 0.3 -135 -110 200 -- -- -- 0.2 0.4 0.55 0.50 -240 -- VOL Output LOW Voltage V IOS VH ICCL ICCH ICCZ Short Circuit Current(4) Input Hysteresis Quiescent Power Supply Current mA mV 150 0.1 VCC = Max., VIN = GND or VCC 10 A NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 3.3V, +25C ambient. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. VOH = VCC -0.6V at rated current. 3083 lnk 05 8.9 3 IDT74FCT163827A/B/C FAST CMOS 20-BIT BUFFERS COMMERCIAL TEMPERATURE RANGE POWER SUPPLY CHARACTERISTICS Symbol ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current (4) VCC = Max. Test Conditions(1) VIN = VCC -0.6V(3) VIN = VCC VIN = GND Min. -- -- Typ.(2) 2.0 50 Max. 30 75 Unit A A/ MHz VCC = Max. Outputs Open xOE1 = xOE2 = GND One Input Toggling 50% Duty Cycle VCC = Max. Outputs Open fi = 10MHz 50% Duty Cycle xOE1 = xOE2 = GND One Bit Toggling VCC = Max. Outputs Open fi = 2.5MHz 50% Duty Cycle xOE1 = xOE2 = GND Twenty Bits Toggling IC Total Power Supply Current (6) VIN = VCC VIN = GND VIN = VCC -0.6V VIN = GND VIN = VCC VIN = GND VIN = VCC -0.6V VIN = GND -- 0.5 0.7 mA -- 0.5 0.8 -- 2.5 3.7 (5) -- 2.5 4.1 (5) NOTES: 1. 2. 3. 4. 5. 6. For conditions shown as max. or min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at VCC = 3.3V, +25C ambient. Per TTL driven input; all other inputs at VCC or GND. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCPNCP/2 + fiNi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ICC = Power Supply Current for a TTL High Input DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at fCP fi = Input Frequency Ni = Number of Inputs at fi 3083 tbl 06 8.9 4 IDT74FCT163827A/B/C FAST CMOS 20-BIT BUFFERS COMMERCIAL TEMPERATURE RANGE SWITCHING CHARACTERISTICS OVER OPERATING RANGE(4) FCT163827A FCT163827B Min.(2) Max. FCT163827C Min.(2) Max. Symbol Parameter tPLH Propagation Delay xAx to xYx tPHL tPZH tPZL Output Enable Time xOEx to xYx tPHZ tPLZ Output Disable Time xOEx to xYx Conditions(1) CL = 50pF RL = 500 CL = 300pF(4) RL = 500 CL = 50pF RL = 500 CL = 300pF(4) RL = 500 CL = 5pF(4) RL = 500 CL = 50pF RL = 500 Min.(2) Max. 1.5 1.5 1.5 1.5 1.5 1.5 -- 8.0 15.0 12.0 23.0 9.0 10.0 0.5 1.5 1.5 1.5 1.5 1.5 1.5 -- 5.0 13.0 8.0 15.0 6.0 7.0 0.5 1.5 1.5 1.5 1.5 1.5 1.5 -- 4.4 10.0 7.0 14.0 5.7 6.0 0.5 Unit ns ns ns tSK(o) Output Skew (3) ns 3083 tbl 07 NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design. 4. Propagation Delays and Enable/Disable times are with VCC = 3.3V 0.3V, Normal Range. For VCC = 2.7V to 3.6V, Extended Range, all Propagation Delays and Enable/Disable times should be degraded by 20%. 8.9 5 IDT74FCT163827A/B/C FAST CMOS 20-BIT BUFFERS COMMERCIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS 6V V CC SWITCH POSITION Test Open Drain Disable Low Enable Low Disable High Enable High All Other tests Switch 6V 500 V Pulse Generator R T IN V D.U.T. OUT 50pF C L 500 SET-UP, HOLD AND RELEASE TIMES DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tSU tH tREM tSU tH PROPAGATION DELAY 3V 1.5V 0V VOH 1.5V VOL 3V 1.5V 0V 3083 drw 08 SAME PHASE INPUT TRANSITION tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL tPHL Open GND GND Open 3083 lnk 08 DEFINITIONS: CL= Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. 3083 drw 05 PULSE WIDTH 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 3083 drw 06 LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE 1.5V 1.5V 3083 drw 07 ENABLE AND DISABLE TIMES ENABLE CONTROL INPUT tPZL OUTPUT NORMALLY SWITCH 6V LOW tPZH OUTPUT NORMALLY HIGH SWITCH GND 3V 1.5V tPHZ 0.3V 1.5V 0V VOH 0V 3083 drw 09 DISABLE 3V 1.5V tPLZ 0V 3V 0.3V VOL NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns. 3. If VCC is below 3V, input voltage swings should be adjusted not to exceed VCC. 8.9 6 IDT74FCT163827A/B/C FAST CMOS 20-BIT BUFFERS COMMERCIAL TEMPERATURE RANGE ORDERING INFORMATION IDT FCT XX XXXX Temp. Range Device Type X Package PV PA PF 163827A 163827B 163827C 74 Shrink Small Outline Package (SO56-1) Thin Shrink Small Outline Package (SO56-2) Thin Very Small Outline Package (SO56-3) Non-Inverting 20-Bit Buffers -40C to +85C 3083 drw 10 8.9 7 |
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